Burn-in apparatus for burning-in microwave transistors

ABSTRACT

A burn-in apparatus for burning in a transistor used in a microwave region including a burn-in frequency signal source for supplying a signal lower in frequency than the operating frequency of the transistor and higher in frequency than the response frequency of impurities in the transistor, an input matching circuit connected between the signal source and an input of the transistor, and an output matching circuit including a load and connected to an output of the transistor.

BACKGROUND OF THE INVENTION

1. 1. Field of the Invention

2. The present invention relates to a method of burning in asemiconductor device used in a microwave region, particularly in aregion at a frequency of not less than 1 GHz.

3. 2. Description of the Related Art

4. While compound semiconductors such as GaAs are used for semiconductortransistors used in microwave regions (several hundreds of MHz to 100GHz), particularly in high-frequency region at a frequency of not lessthan 1 GHz, such compound semiconductors have various impurity levels onthe surface and inside thereof. Some of these levels experience chronicchanges such as diminishing level due to electric stress given to thetransistor, and therefore burn-in process is carried out whereinelectric stress is given to the transistor to cause chronic changesbeforehand in order to ensure reliability of the transistor.

5.FIG. 14 is a schematic diagram of a burn-in apparatus of the priorart. In the drawing, reference numeral 1 denotes a transistor, 2 denotesa package, 3 denotes a matching circuit at the operating frequency. Thesemiconductor device being burned in is an internally matched FET havinga matching circuit incorporated in the package.

6. Burn-in is carried out, with a predetermined drain voltage beingapplied to a transistor 1, by amplifying a frequency signal (for example20 GHz) which is output from a signal source 5 by means of an amplifier7 and supplying the signal to a gate of the transistor 1 whilemaintaining this state for a predetermined period of time and monitoringthe power of the input and output microwave by means of a power monitor6.

7. During such a burn-in operation, unless frequency matching isaccurately done, reflected wave is generated due to parasitic inductanceand capacitance of jigs and wirings, thus making it impossible to feedhigh-frequency signals to the transistor, and consequently it becomesdifficult to carry out such matching in high-frequency region not lowerthan 1 GHz. Also it becomes necessary to fabricate wiring of thematching circuit with a high dimensional accuracy in order to match thefrequency. These results in higher cost of the matching circuit itselfand higher total cost including peripheral devices such as theamplifier.

8. Meanwhile the present inventors have intensively studied. As aresult, it has been found that, while burn-in of impurity level of asemiconductor is carried out by high-frequency electric stress applied,such an effect of burn-in may also be achieved by using a frequencylower than the operating frequency, but impurities at the impurity levelrespond to frequencies lower than a certain value and are mobilized thusmaking it impossible to achieve the same burn-in effect as that carriedout at the operating frequency.

9. That is, because impurities at the impurity level have differentresponse frequencies (reciprocal of response speed), the impuritiescannot follow the changes in the electric field and move accordingly inthe case of burn-in with alternating electric field of a frequencyhigher than the response frequency of the impurity level. When theburn-in frequency is set lower than the response frequency, however, theimpurities are caused to move in a behavior different from that observedduring burn-in at the operating frequency where the impurities do notmove, thus the desired burn-in effect cannot be achieved.

10. According to the inventor's knowledge, the frequency at which theimpurities at the impurity level begin to move is 100 MHz or lower forsemiconductors such as GaAs, and physical behavior of impurities remainsthe same whether the frequency is 1 GHz or 100 GHz, as far as it ishigher than 100 MHz.

11. At a frequency higher than 100 MHz, thermal effect can be preventedbecause this frequency is sufficiently higher than the transient thermalresponse frequency of semiconductor which is several mega-hertz.

12. Based on the finding described above, it is assumed that burn-ineffect similar to that achieved at the actual operating frequency, forexample 18 GHz or 40 GHz, can be obtained by burning in at a frequencyhigher than 100 MHz.

13. Japanese Patent Kokai Publication No. 60-33066 discloses a method ofburning in by applying a low-frequency signal (10 MHz or lower) to agate electrode of a high-frequency transistor. However, becauseimpurities at the impurity level begin to move at such a low frequencyas 10 MHz or lower, it will not be possible to achieve the same burn-ineffect as that obtained with the operating frequency (100 MHz to 20GHz).

SUMMARY OF THE INVENTION

14. That is, an object of the present invention is to provide a methodof producing a semiconductor device having the same burn-in effect as isachieved by burning in at the operating frequency, through burn-in at afrequency lower than the operating frequency of a high-frequencytransistor.

15. The present invention provides a method of burning in semiconductortransistors by supplying a signal of burn-in frequency to thesemiconductor transistors used in a microwave region, wherein theburn-in frequency is set lower than the operating frequency of thesemiconductor transistor device and is higher than the responsefrequency of the impurities included at the impurity level.

16. By employing such a method as described above, the same burn-ineffect as is achieved by burning in at the operating frequency can beachieved, even when burn-in is carried out at a frequency lower than theactual operating frequency (microwave region from several hundreds ofmega-hertz to 100 GHz).

17. The burn-in frequency is preferably higher than the transientthermal response frequency of the semiconductor transistor.

18. This is because, when burned in at a frequency higher than thetransient thermal response frequency, heat due to transient thermalresponse is not generated during burn-in process and therefore burn-incondition can be prevented from changing.

19. The operating frequency is preferably higher than 1 GHz.

20. This is because it makes it possible to burn in a semiconductortransistor of a high operating frequency at a lower burn-in frequency.

21. The burn-in frequency is preferably selected from the range from 10MHz to 1 GHz.

22. The burn-in frequency is more preferably selected from the rangefrom 100 MHz to 1 GHz.

23. The semiconductor transistor device may also consist of an inputmatching circuit for the operating frequency, the semiconductortransistor and an output matching circuit for the operating frequency.

24. The burn-in operation may also be done by connecting an input/outputmatching circuit for the burn-in frequency to the semiconductortransistor device.

25. The semiconductor transistor may also be put in class A operation byusing a resistor R for the load of the output matching circuit.

26. This is because such a method enables it to burn in a semiconductortransistor used in class A operation.

27. The semiconductor transistor may also be put in class C operation byusing a resistor R and an LC parallel circuit which is connected inparallel with the resistor R and resonates at the burn-in frequency forthe load of the output matching circuit.

28. This is because such a method enables it to burn in a semiconductortransistor used in class C operation.

29. The semiconductor transistor may also be put in class F operation byusing a resistor R, a first LC parallel circuit which is connected inparallel with the resistor R and resonates at the burn-in frequency anda second LC parallel circuit which is connected in series between theresistor R and the first LC parallel circuit and the transistor outputand resonates at a frequency three times the burn-in frequency, for theload of the output matching circuit.

30. This is because such a method enables it to burn in a semiconductortransistor used in class F operation.

31. The present invention also provides a burn-in apparatus for burningin the semiconductor transistor used in microwave region by supplying asignal of burn-in frequency, comprising a burn-in frequency signalsource, a semiconductor transistor device with an input connected to thesignal source, and a load connected to an output of the semiconductortransistor device, wherein the burn-in frequency is lower than theoperating frequency of the semiconductor transistor device and is higherthan the response frequency of impurities included at the impurity levelof the semiconductor transistor.

32. Use of such a burn-in apparatus makes it possible to easily achievematching at the burn-in frequency.

33. The semiconductor transistor device preferably incorporates an inputmatching circuit for the operating frequency, the semiconductortransistor and an output matching circuit for the operating frequency.

34. The load may also comprise a resistor R to have the semiconductortransistor function in class A operation.

35. This is because harmonics will not be generated in class Aoperation, and use of the resistor R makes burn-in possible.

36. The load may also comprise a resistor R and a LC parallel circuitwhich is connected to the resistor R in parallel and resonates at theburn-in frequency to have the semiconductor transistor function in classC operation.

37. This is because generation of harmonics must be taken intoconsideration in the case of class C operation, and use of the load ofsuch a configuration makes it possible to load the semiconductortransistor.

38. The load may also comprise a resistor R, a first LC parallel circuitwhich is connected to the resistor R in parallel and resonates at theburn-in frequency and a second LC parallel circuit which is connected inseries between the resistor R and the first LC parallel circuit and thetransistor output and resonates at a frequency three times the burn-infrequency, to have the semiconductor transistor function in class Foperation.

39. This is because generation of harmonics must be taken intoconsideration also in the case of class F operation, and use of the loadof such a configuration makes it possible to load the semiconductortransistor.

40. The semiconductor transistor may also be mounted in a burn-inpackage with the package incorporating an attenuator circuit mountedtherein for attenuating frequencies higher than the burn-in frequency.

41. This is because use of such a low-cost low-frequency package makesit possible to decrease the package cost and mounting the attenuatorcircuit in the package makes it possible to prevent oscillation duringburn-in process.

42. The attenuator circuit preferably comprises a CR series circuit.

43. This is because such a configuration makes it possible to attenuateoscillation during burn-in process most simply and at a low cost.

44. The load may also be configured to substantially match the actualoperation parameters of the semiconductor transistor which aredetermined by measuring drain voltage and drain current of output signalof the semiconductor transistor.

45. The semiconductor transistor device may also have an input matchingcircuit provided at the input side thereof for resistance matching.

46. The present invention also provides a semiconductor transistor whichis burned in by a method of any one of claims 1 to 10.

47. Burning in by such methods makes it possible to improve thereliability of semiconductor transistors operating at high frequencies.

48. According to the present invention, as described above, it is madepossible to carry out burn-in with a lower frequency while preventingundesirable oscillation, by using a low-frequency package 2 of lowercost with C and R added thereto for attenuating high-frequencycomponents added therein.

49. Although the high-impedance probe is used instead of a power sensorin this embodiment, electric stress to the transistor may also bedetermined through calculation of voltage and current because thevoltage can be directly measured at a low frequency such as 800 MHz.

50. While the first to fourth embodiments relate to the burn-in processof FET of operating frequency 18 GHz, burn-in at 800 MHz can be donewith the same method for FETs of different operating frequencies such as40 GHz and 10 GHz.

51. As will be clear from the foregoing discussion, the burn-in methodof the present invention makes it possible to achieve the same burn-ineffect as that achieved by burning in at the operating frequency,through burn-in at a burn-in frequency lower than the actual operatingfrequency in microwave region (several hundreds of mega-hertz to 100GHz).

52. This makes it possible to achieve easy matching at the burn-infrequency and reduce the production processes.

53. It is also made possible to prevent the burn-in conditions fromchanging, because heat generation due to transient thermal response doesnot occur during burn-in as the burn-in process is carried out at afrequency higher than the transient thermal response frequency.

54. The frequency of the high-frequency signal is preferably selectedfrom the range from 10 MHz to 1 GHz, and more preferably selected fromthe range from 100 MHz to 1 GHz.

55. By using the burn-in apparatus of the present invention, it is madepossible to carry out burn-in with a low-cost apparatus and reduce theproduction cost.

56. It is made possible to apply sufficient load to a semiconductortransistor while taking the generation of harmonics into consideration,by using a resistor R for the load when the semiconductor transistor isused in class A operation, by using a resistor R and an LC parallelcircuit which is connected in parallel with the resistor R and resonatesat the burn-in frequency for the load when the semiconductor transistoris used in class C operation, and by using a resistor R, a first LCparallel circuit which is connected in parallel with the resistor R andresonates at the burn-in frequency and a second LC parallel circuitwhich is connected in series between the resistor R and the first LCparallel circuit and the transistor output and resonates at a frequencythree times the burn-in frequency when the semiconductor transistor isused in class F operation.

57. By incorporating the semiconductor transistor in a package andproviding an attenuation circuit for attenuating components offrequencies higher than the burn-in frequency in the package, it is madepossible to reduce the package cost and prevent oscillation fromoccurring during burn-in.

58. Also high reliability can be achieved for semiconductor transistorsburned in by the method of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

59.FIG. 1 is a schematic diagram of a burn-in apparatus of the firstembodiment of the present invention.

60.FIG. 2 shows a change in Idss with a lapse of time when burning in bythe method of the first embodiment of the present invention.

61.FIG. 3 shows a relationship between Vds and Ids of a semiconductortransistor used in class A operation.

62.FIG. 4 shows a load resistor used in the first embodiment of thepresent invention.

63.FIG. 5 shows a load resistor used in the second embodiment of thepresent invention.

64.FIG. 6 shows a waveform of Vds and Ids when an FET is used in class Coperation.

65.FIG. 7 shows the load curve when the FET is used in class Coperation.

66.FIG. 8 shows a load resistor used in the second embodiment of thepresent invention.

67.FIG. 9 shows a waveform of Vds and Ids when an FET is used in class Foperation.

68.FIG. 10 shows the load curve when the FET is used in class Foperation.

69.FIG. 11 shows the load curve of the FET.

70.FIG. 12 shows a waveform of Vds and Ids of the FET.

71.FIG. 13 is a schematic diagram of a burn-in apparatus of the fourthembodiment of the present invention.

72.FIG. 14 is a schematic diagram of a burn-in apparatus of the priorart.

73.FIG. 15 shows a relationship between Vds and Ids of a high-frequencytransistor.

74.FIG. 16 shows a relationship between Vds and Ids of a high-frequencytransistor.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

75. Embodiment 1

76. First embodiment of the present invention will now be describedbelow with reference to FIGS. 1 to 5.

77. According to this embodiment, an internally matched GaAs FEToperating at 18 GHz in class A or class AB operation (having a matchingcircuit for 18 GHz incorporated in the package) is burned in.

78.FIG. 1 is a schematic diagram showing one channel portion of aburn-in apparatus which burns in a device having operating frequency of18 GHz at a burn-in frequency of 800 MHz. In the drawing, referencenumerals identical with those used in FIG. 14 denote the same orcorresponding portions. Numeral 10 denotes a resistive load, 9 denotesan input side low-frequency matching circuit and 10 denotes an outputside low-frequency matching circuit.

79. In FIG. 1, the semiconductor device to be burned in is an internallymatched FET as described above, and therefore a matching circuit 3 for18 GHz is incorporated in the package 2. However, at a low frequencysuch as 800 MHz, parasitic capacitance and inductance of the matchingcircuit 3 may be ignored, and it will suffice to achieve matching bytaking only the input matching circuit 9 and the output matching circuit10 outside of the package 2 into consideration.

80. As described above, in the burn-in process wherein electric stressis given by applying a high-frequency signal, the impurities cannotfollow the changes in the electric field in the case of alternatingelectric field changing at a frequency higher than the responsefrequency of the impurity level while, when the burn-in frequency is setlower than the response frequency, burn-in effect is changed because theimpurities included at the impurity level are moved.

81. In the case of a GaAs semiconductor transistor, for example, becausethe response frequency of the highest level is below 100 MHz, althoughphysical behavior of impurities remains the same even when a frequencyof 1 GHz or 100 GHz is applied as far as it is higher than 100 MHz, theimpurities in the impurity level are moved when a frequency lower than100 MHz is applied resulting in the burn-in effect different from thatachieved at the operating frequency of 1 GHz or higher.

82. At a frequency higher than 100 MHz, because this is sufficientlyhigher than the transient thermal response frequency which is severalmega-hertz, thermal effect due to the application of the frequency isconsidered to remain the same. This is because, when burned in at afrequency lower than the transient thermal response frequency, heat isgenerated during burn-in process thus causing the burn-in condition tochange.

83. Thus it is expected that, in the case of GaAs transistor, burn-ineffect similar to that achieved by using 18 GHz is used can be obtainedby burning in at a frequency higher than 100 MHz which is the responsefrequency of the highest impurity level, although lower than 18 GHzwhich is the actual operating frequency.

84.FIG. 3 shows a load curve of an internally matched FET used at 18GHz. Gradient of the load curve shows that the load resistance is 25 Ω.In the case of burn-in at 800 MHz, because parasitic circuit componentsin the high-frequency matching circuit 3 and in the vicinity of the FETcan be ignored, matching can be achieved by using a pure resistanceZ_(L)=25 Ω (FIG. 4) for the load (Z_(L)) 10.

85. While FIG. 3 shows plots of calculated values, voltages at the inputand output terminals can be easily measured by means of a samplingoscilloscope or the like in the case of a low frequency around 100 MHz,for example, and parasitic circuit components can be ignored, thus it ispossible to directly measure the electric field stress applied only tothe transistor.

86.FIG. 2 shows changes in Idss of samples (FET which is internallymatched for 18 GHz) when burned in at 800 MHz. While FIG. 2 shows theresults of burning in three kinds of sample, which showed no change inIdss when burned in by applying either heat or DC voltage only, butshowed a decrease in Idss at a time about 48 hours have passed after theconventional burn-in at 18 GHz.

87. As shown in FIG. 2, each sample showed a decrease in Idss also afterburn-in at 800 MHz according to this embodiment, and plots of thechronic changes show a pattern similar to that of conventional burn-inat 18 GHz. Thus it can be seen that burn-in effect similar to thatachieved at 18 GHz is obtained by burning in at 800 MHz. The graphinterrupted at a middle point indicates that the sample failed at thepoint.

88. In the case of burn-in at 800 MHz, as this frequency is below{fraction (1/20)}of 18 GHz, costs of the signal source, amplifier, powermonitor and jig are lower than that for the conventional burn-inapparatus of 18 GHz (FIG. 14) and the producing cost of thesemiconductor device can be lowered.

89. Because burn-in at 800 MHz can be done without matching at 18 GHz,burn-in carried out in a mass production process or the like only forassuring the reliability can be done without a difficult operation ofmatching at a high-frequency, thus making it possible to assurereliability easily in a shorter period of time.

90. This embodiment is aimed at solving the problems of the conventionalburn-in process at the operating frequency (18 GHz) as follows.

91.FIG. 15 shows a load curve at 18 GHz calculated for point A of atransistor (output matching circuit end) of the conventional burn-inapparatus (FIG. 14) which performs burn-in at the operating frequency(18 GHz). In the drawing, dashed line indicates the DC characteristicsof the transistor at Vg=0 to 1.5 V, together with a load curve when theinput voltage P_(in) is changed from −14 to +32 dBm with an increment of2 dB.

92. The load curve deviates from the DC characteristic into a closedloop configuration because of parasitic capacitance and inductance of awire 4, pad, wiring and the like in the vicinity of the transistor 1,and it is assumed that the load curve would have relatively linear shapeas that of the calculated values plotted in FIG. 15 in the transistor(point B of FIG. 1) right below the gate.

93. In actuality, however, because load curve cannot be directlymeasured at a high-frequency region such as 18 GHz, it cannot be knownunder what conditions of voltage and current the transistor right belowthe gate is operating. Therefore, relationship between the electricfield stress and the variations in the characteristic is not clear, andit is necessary to determine the burn-in conditions experimentally foreach operating frequency and device, taking much time setting theburn-in conditions.

94. According to the present invention, because burn-in operation iscarried out by using a frequency lower than the operating frequency,load curve can be directly measured depending on the conditions, and theburn-in conditions can be easily established.

95. In the case of FET of class A operation, because the electric fieldstress (load resistance) is determined from the gradient of the loadcurve, burn-in can be done by setting the load resistance to a fixedvalue, without determining the load resistance for each frequency usedin burn-in and for the transistor to be burned in.

96. When the load curve shown in FIG. 3 is obtained as described above,load resistance of 25 Ω is determined from the gradient of the loadcurve. Therefore burn-in can be done with simple preset conditions that25 Ω resistive load is used for the load (Z_(L)) 10 of FIG. 1 and ACvoltage of output power 32 dBm is applied.

97. This embodiment, because the input matching circuit 9 is ofresistive matching type and oscillation is unlikely to occur, has alsosuch an advantage that stable burn-in can be carried out even at lowfrequencies.

98. That is, although the transistor has a high gain at a low frequencyand tends to have unstable input power, matching and stability can beachieved at the same time by means of an input resistor. A loss in theinput power which occurs because of not being allotted to the transistordue to the input resistor ratio may be compensated for by increasing theamplifier output, and therefore there is no need for fine tuning of theinput matching, -thus resulting in easier design and adjustment of thematching.

99. Embodiment 2

100. Second embodiment of the present invention will now be describedbelow with reference to FIGS. 5 to 10.

101. In contrast to the first embodiment wherein the FET used in class Aoperation is burned in, this embodiment refers to a burn-in process ofinternally matched GaAs FET used in class C or class F operation at afrequency of 18 GHz.

102. While class B or class F operation is employed in order to achievea high-efficiency transistor operation, sufficient load cannot beapplied to the FET by simply using a resistor for the load 10, as in thefirst embodiment, for the transistor used for such a high-efficiencyclass of operation, which makes it necessary to take into considerationthe effect of harmonics being generated.

103.FIG. 5 shows a load (Z_(L)) which is matched for high frequency forthe use in burn-in of FET designed for class B operation in thisembodiment. In the drawing, L and C are parameters which cause resonanceat the burn-in frequency (800 MHz), namely that satisfy the relationship2πf=1/{square root}{square root over ( )} (LC). Z_(L) for thefundamental frequency (800 MHz) is R, and harmonics are all shorted.

104.FIGS. 6A and 6B show the changes in Vds and Ids during class Boperation of the FET. FIG. 7 shows the load curve during the class Boperation. The load curve shown in FIG. 7 is different from the loadcurve for class A operation shown in FIG. 3, showing the voltage Vdsincreasing to a high value at Ids=0. This is because the maximum drainvoltage changes due to the existence of the harmonics resulting in asubstantial variation of the electric stress in the case of class Boperation even when the load for the fundamental frequency is the same.

105. Consequently, when burning in an FET used in class B operation at afrequency of 18 GHz by using a lower frequency of 800 MHz, it isnecessary to achieve matching for the harmonics by using the resonancecircuit shown in FIG. 5 for the load 10 of the burn-in apparatus shownin FIG. 1, unlike in the case of class A operation.

106.FIG. 8 shows the load (Z_(L)) 10 which is matched for high frequencyfor the use in burn-in of an internally matched GaAs FET designed forclass F operation at a frequency of 18 GHz by using a lower frequency of80 MHz. When burning in an FET used in class F operation, the load shownin FIG. 8 is used instead of the load 10 of the burn-in apparatus shownin FIG. 1. This is because harmonics including those having frequenciestwo times and three times the fundamental frequency (800 MHz) aregenerated in class F operation, which must be taken into considerationwhen setting the load.

107. The load shown in FIG. 8 is designed so that a circuit of L3 and C3resonates with three times the fundamental frequency (namely satisfiesthe relationship 2π3f=1/{square root}{square root over ( )} (L3·C3)) anda circuit of L and C resonates with the fundamental frequency (namelysatisfies the relationship 2πf=1/{square root}{square root over ( )}(L·C)). That is, the load is matched to be open for a harmoniccomponents of three times the fundamental frequency, acts as a resistorR for the fundamental frequency and is shorted for other harmonics.

108.FIGS. 9A and 9B show the changes in Vds and Ids during class Foperation of the FET. FIG. 10 shows the load curve during the class Foperation.

109. As will be clear from the load curve, the electric stress cannot bemade constant unless matching similar to that for high frequency isachieved for device used in class F operation similarly to the case ofclass B operation, even if operated at a lower frequency of 800 MHz.

110. Consequently, it is necessary to apply a constant electric stressby matching for the harmonics to be generated by using the resonancecircuit for the load (Z_(L)), as described above. Then burn-in effectsimilar to that achieved at 18 GHz is obtained by using the resonancecircuit as the load and burning in at a lower frequency of 800 MHz,thereby making it possible to reduce the production cost.

111. Embodiment 3

112. Third embodiment of the present invention will now be describedbelow with reference to FIGS. 11 and 12.

113. While the first and the second embodiments relate to the burn-inprocess of internally matched GaAs FET used in class A, class C or classF operation, there are others which show complicated load curves asshown in FIG. 11.

114. In order to burn in such an internally matched GaAs FET, there is amethod of low-frequency burn-in at 800 MHz wherein substantially thesame electric stress as that of the operating frequency, 18 GHz, isapplied to the transistor by using a virtual load having acharacteristic curve that passes the points (Id1, Vd1), (Id2, Vd2) and(Id3, Vd3) of FIG. 11.

115. When such a method is used, burn-in effect similar to that obtainedunder the conditions of FIG. 11 can be achieved by using a combinationof R, L and C for the load (Z_(L)) 10 of the burn-in apparatus shown inFIG. 1 so that an imaginary load curve determined by the combinationpasses key points (a point with maximum Vd, a point with maximum Id anda mid point therebetween in FIG. 11) of the actual load curve, andcarrying out burn-in by using such a load.

116. It is also possible to carry out burn-in by applying a load thathas a greater stress and satisfies relationships Vd>Vd3, Id>Id1 andVd<Vd1.

117.FIGS. 12A, 12B and 12C show the changes of Ids, Vds and Vgs in thecase where the load curve shown in FIG. 11 is obtained.

118. While the electric stress is defined by the drain voltage and draincurrent in the first and the second embodiments, burn-in may also becarried out by using the value of Vg thereby applying an electric fieldstress between the gate and the drain, apart from burn-in carried out byapplying drain voltage, in case the electric field stress between thegate and the drain is dominant in determining the reliability of thetransistor.

119. That is, electric field stress greater than (Vd3-Vg3) can be givenbetween the gate and the drain by setting the input load so that eitherthe load curve passes Vd3 and Vg3 or Vd>Vd3 and Vg<Vg3 are satisfied asconditions of greater stress, It is preferable to use a resistive loadfor the input load.

120. With this configuration, it is made possible to carry out burn-inat a lower frequency such as 800 MHz, instead of the operating frequencyof 18 GHz, between the gate and the drain as well, thereby to reduce theburn-in cost.

121. Embodiment 4

122. While the first to third embodiments relate to the burn-in processof internally matched GaAs FET having the matching circuit 3 for 18 GHzincorporated in the package 2, the first through the third embodimentsmay also be applied for burning in only an FET without the internalmatching circuit provided. In the case of a device which is notinternally matched, namely does not have a matching circuit, a low-costpackage made for use at low frequencies may be used for the sample to beburned in.

123.FIG. 13 is a schematic diagram of a burn-in apparatus for FETswithout internal matching circuit 3. In the drawing, reference numeralsidentical with those used in FIG. 14 denote the same or correspondingportions. Numeral 11 denotes a CR series circuit, and 12 denotes ahigh-impedance probe.

124. When the low-frequency package 2 is used, it is often madeimpossible for high-frequency signals to pass the input/output terminalsdue to resonance at high frequencies. Because a high-frequencytransistor has high gain up to a high-frequency region, high-frequencycomponents which do not pass the input/output terminals are completelyreflected at the input/output terminals, often resulting in oscillationin the package.

125. Therefore this embodiment prevents the high-frequency oscillationin the package 2 which occurs even when burning in by using a lowfrequency of 800 MHz, by adding C and R (11 in FIG. 13) for attenuatinghigh-frequency components.

126. For a frequency of 18 GHz, for example, a sufficiently stablecircuit without oscillation can be made by setting as R=100 Ω and C=1pF, but such a circuit has no substantial effect to the burn-infrequency of 800 MHz.

What is claimed is:
 1. A method of burning in a semiconductor transistorwhich comprises steps of; providing a signal of burn-in frequency, andsupplying the signal to the semiconductor transistor used in microwaveregion, wherein the signal is set lower than the operating frequency ofthe semiconductor transistor device and is higher than the responsefrequency of the impurities included at the impurity level.
 2. Themethod as claimed in claim 1 , wherein the burn-in frequency is higherthan the transient thermal response frequency of the semiconductortransistor.
 3. The method as claimed in claim 1 , wherein the operatingfrequency is higher than 1 GHz.
 4. The method as claimed in claim 1 ,wherein the burn-in frequency is selected from the range from 10 MHz to1 GHz.
 5. The method as claimed in claim 1 , wherein the burn-infrequency is selected from the range from 100 MHz to 1 GHz.
 6. Themethod as claimed in claim 1 , wherein the semiconductor transistordevice consists of an input matching circuit for the operatingfrequency, the semiconductor transistor and an output matching circuitfor the operating frequency.
 7. The method as claimed in claim 6 ,wherein the burn-in operation is done by connecting an input/outputmatching circuit for the burn-in frequency to the semiconductortransistor device.
 8. The method as claimed in claim 7 , wherein thesemiconductor transistor is put in class A operation by using a resistorR for the load of the output matching circuit.
 9. The method as claimedin claim 7 , wherein the semiconductor transistor is put in class Coperation by using a resistor R and an LC parallel circuit which isconnected in parallel with the resistor R and resonates at the burn-infrequency for the load of the output matching circuit.
 10. The method asclaimed in claim 7 , wherein the semiconductor transistor is put inclass F operation by using a resistor R, a first LC parallel circuitwhich is connected in parallel with the resistor R and resonates at theburn-in frequency and a second LC parallel circuit which is connected inseries between the resistor R and the first LC parallel circuit and thetransistor output and resonates at a frequency three times the burn-infrequency, for the load of the output matching circuit.
 11. A burn-inapparatus for burning in the semiconductor transistor used in microwaveregion by supplying a signal of burn-in frequency comprising; a burn-infrequency signal source, capable of supplying the signal which is lowerthan the operating frequency of the semiconductor transistor device andis higher than the response frequency of impurities included at theimpurity level of the semiconductor transistor, an input matchingcircuit connected between the signal source and an input of thesemiconductor transistor, and an output matching circuit comprising aload and connected to an output of the semiconductor transistor.
 12. Theapparatus as claimed in claim 11 , wherein the semiconductor transistordevice incorporates an input matching circuit for the operatingfrequency, the semiconductor transistor and an output matching circuitfor the operating frequency.
 13. The apparatus as claimed in claim 11 ,wherein the load comprises a resistor R to have the semiconductortransistor function in class A operation.
 14. The apparatus as claimedin claim 11 , wherein the load comprises a resistor R and a LC parallelcircuit which is connected to the resistor R in parallel and resonatesat the burn-in frequency to have the semiconductor transistor functionin class C operation.
 15. The apparatus as claimed in claim 11 , whereinthe load comprises a resistor R, a first LC parallel circuit which isconnected to the resistor R in parallel and resonates at the burn-infrequency and a second LC parallel circuit which is connected in seriesbetween the resistor R and the first LC parallel circuit and thetransistor output and resonates at a frequency three times the burn-infrequency, to have the semiconductor transistor function in class Foperation.
 16. The apparatus as claimed in claim 11 , wherein thesemiconductor transistor is mounted in a burn-in package with thepackage incorporating an attenuator circuit mounted therein forattenuating frequencies higher than the burn-in frequency.
 17. Theapparatus as claimed in claim 16 , wherein the attenuator circuitcomprises a CR series circuit.
 18. The apparatus as claimed in claim 11, wherein the load is configured to substantially match the actualoperation parameters of the semiconductor transistor which aredetermined by measuring drain voltage and drain current of output signalof the semiconductor transistor.
 19. The apparatus as claimed in claim11 , wherein the semiconductor transistor device has an input matchingcircuit provided at the input side thereof for resistance matching. 20.A semiconductor transistor which is burned in by the method of claim 1 .